1. Field of the Invention
The present invention relates to a semiconductor memory device, for example, a dynamic random access memory (DRAM) or DRAM-incorporated device, and a method of manufacturing the same.
2. Description of the Related Art
In a DRAM or embedded DRAM device (hereinafter referred simply to as a DRAM), a surface strap (SS) type of contact is known which is used to make connection between a memory capacitor formed in a deep trench (DT) and an active area (AA). The SS contact is provided on a semiconductor substrate and formed of a layer of, for example, conductive polysilicon which extends from the capacitor to the active area. By this contact, the capacitor is connected to a source/drain diffusion layer of a transfer gate MOS (metal oxide semiconductor) transistor formed on the semiconductor substrate.
FIGS. 23A and 23B and FIGS. 24A and 24B show sectional structures of a DRAM having SS contacts in the order of steps of manufacture. As shown in FIGS. 23A and 23B, to expose storage nodes 101 prior to formation of contacts (conductive layer), a portion of the surface of each of a trench top insulation (trench top oxide) layer 102 and a device isolation insulation layer 109 is etched away. At this point, since the top portion of a collar oxide layer 103 is also etched away at the same time, a groove 104 is formed on it and consequently the side of a semiconductor substrate 105, such as silicon, is exposed. As a result, a connecting conductive layer 106 is also formed inside the groove as shown in FIGS. 24A and 24B.
Impurities penetrating from the connecting conductive layer 106 into the side of the semiconductor substrate 105 diffuse within the substrate to form unwanted diffusion layers 108 in the position deeper than source/drain diffusion layers 107a. The presence of each diffusion layer 108 causes a degradation in the punch-through characteristic between the diffusion layer 108 and a source/drain diffusion layer 107b which are opposed to each other with the gate interposed therebetween.
As shown in FIG. 24B, the surface of the semiconductor substrate 105 protrudes from the surface of the device isolation insulation layer 109. For this reason, when the connecting conductive layer 106 is formed through epitaxial growth from the semiconductor substrate 105, the silicon crystal may grow from the sidewall of the semiconductor substrate 105. In such a case, silicon on each sidewall of the semiconductor substrate 1 may come into contact with silicon on the adjacent sidewall, causing a short circuit.